Interlock ladder editor
Beta · Edit & validate1 2 3 insert · ⌥↓ branch below the selection · ⇥ out of a branch · ⌘⏎ new rung · ? every key
Simulate
I/O rack
Watch
Power flow
Beta simulator · model limits
With cleared edge memory, a rung already true on the first scan produces an ONS pulse and a CTU or CTD count. Interlock does not perform Logix prescan, which suppresses that initial event.
Dialect choices change labels, not execution. Validate startup, restart and retained-state behavior on the intended controller before relying on a result. Saving, issuing or server verification does not establish vendor conformance.
A browser print is an editor snapshot, not a commissioning test report.
Validation is the same rule set the server re-runs — one validator, no second copy.